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Registrations open – Free VLSI Workshop on 25th Feb 2018
Find the answer of all your questions regarding Semiconductor Industry at the FREE VLSI workshop happening on 25th Feb with Mr.P R SivaKumar, CEO- Maven Silicon & Founder- Aceic Design Technologies With 20+ years’ Experience in Semiconductor Industry Who can attend? Pre-Final/Final Year Students of B.Tech /B.E. from ECE, EEE,TE, Instrumentation Students of ME/MTech/MS in Electronics/MSc Electronics Students who have finished engineering from any of the above stream in 2016/2017 Date: 25/02/2018, Sunday Time: 9 AM to 1 PM Speaker: Mr.P R SivaKumar,CEO Maven Silicon Agenda of the workshop Overview of VLSI Design IP, Chips and SoCs Introduction to VLSI Design Flow Front End Vs Back End RTL Design using HDL Verilog Vs VHDL, Overview of Verilog Functional Verification System Verilog and UVM based test benches Code and Functional coverage Indian Semiconductor Industry Products and road maps, Job Opportunities, VLSI Finishing school Q &A Session Register here: http
Venue : Bangalore, # 21/1A, III Floor, Marudhar Avenue, Gottigere, Bannerghatta Road, Bangalore 560076
Date : 02/25/2018 9.00
Contact : 9148637555
 


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